Datasheet

Section 8 I/O Ports
Rev. 3.00 Mar 21, 2006 page 223 of 788
REJ09B0300-0300
8.15.1 Port E and Port F Data Direction Registers (PEDDR, PFDDR)
PEDDR and PFDDR select input or output for the pins of port E and port F on a bit-by-bit basis.
Bit Bit Name Initial Value R/W Description
7 PE7DDR 0 W
6 PE6DDR 0 W
5 PE5DDR 0 W
4 PE4DDR 0 W
3 PE3DDR 0 W
2 PE2DDR 0 W
1 PE1DDR 0 W
0 PE0DDR 0 W
0: Port E pin is an input pin
1: Port E pin is an output pin
PEDDR has the same address as PEPIN, and if
read, the port E pin states will be returned.
Bit Bit Name Initial Value R/W Description
7 PF7DDR 0 W
6 PF6DDR 0 W
5 PF5DDR 0 W
4 PF4DDR 0 W
3 PF3DDR 0 W
2 PF2DDR 0 W
1 PF1DDR 0 W
0 PF0DDR 0 W
0: Port F pin is an input pin
1: Port F pin is an output pin
PFDDR has the same address as PFPIN, and if
read, the port F pin states will be returned.