Datasheet

Section 8 I/O Ports
Rev. 3.00 Mar 21, 2006 page 195 of 788
REJ09B0300-0300
• P75/AN5, P74/AN4, P73/AN3, P72/AN2, P71/AN1, P70/AN0
P75 to P70 input pinsPin Function
AN5 to AN0 input pin
*
Note: * This pin can always be used as the AN5 to AN0 input pins.
8.9 Port 8
Port 8 is an 8-bit I/O port. Port 8 pins also function as SCI_1 I/O pins, the IIC_1 I/O pin, XBS I/O
pins, LPC I/O pins, and interrupt input pins. The output type of P86 and SCK1 is NMOS push-pull
output. The output type of SCL1 is NMOS open drain output and direct bus driving is enabled.
Port 8 pin functions are the same in all operating modes except host interface function. Port 8 has
the following registers.
• Port 8 data direction register (P8DDR)
• Port 8 data register (P8DR)
8.9.1 Port 8 Data Direction Register (P8DDR)
P8DDR specifies input or output for the pins of port 8 on a bit-by-bit basis.
Bit Bit Name Initial Value R/W Description
7— 1 — Reserved
The initial value must not be changed.
6 P86DDR 0 W
5 P85DDR 0 W
4 P84DDR 0 W
3 P83DDR 0 W
2 P82DDR 0 W
1 P81DDR 0 W
0 P80DDR 0 W
P8DDR has the same address as PBPIN, and if
read, the port B state will be returned.
The corresponding port 8 pins are output ports
when P8DDR bits are set to 1, and input ports
when cleared to 0.