Datasheet

Section 5 Interrupt Controller
Rev. 3.00 Mar 21, 2006 page 110 of 788
REJ09B0300-0300
5.6.3 Interrupt Exception Handling Sequence
Figure 5.7 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.