Datasheet

Section 5 Interrupt Controller
Rev. 3.00 Mar 21, 2006 page 93 of 788
REJ09B0300-0300
5.3.2 Address Break Control Register (ABRKCR)
ABRKCR controls the address breaks. When both the CMF flag and BIE flag are set to 1, an
address break is requested.
Bit Bit Name Initial Value R/W Description
7 CMF 0 R Condition Match Flag
Address break source flag. Indicates that an
address specified by BARA to BARC is
prefetched.
[Setting condition]
When an address specified by BARA to BARC
is prefetched while the BIE flag is set to 1.
[Clearing condition]
When an exception handling is executed for an
address break interrupt.
6
to
1
— All 0 R Reserved
These bits are always read as 0 and cannot be
modified.
0 BIE 0 R/W Break Interrupt Enable
Enables or disables address break.
0: Disabled
1: Enabled