Datasheet

Section 3 MCU Operating Modes
Rev. 3.00 Mar 21, 2006 page 80 of 788
REJ09B0300-0300
Note: * These areas can be used as an external address space by clearing bit RAME in SYSCR to 0.
Mode 3 (EXPE = 0)
Normal mode
Single-chip mode
H'DFFF
H'0000
H'DFFF
H'0000
On-chip ROM
External address
space
On-chip ROM
Mode 3 (EXPE = 1)
Normal mode
Extended mode with
on-chip ROM enabled
Internal I/O
registers 2
On-chip RAM
Internal I/O
registers 1
H'EFFF
H'E080
H'FEFF
H'FFFF
H'FE50
H'FF7F
H'FF80
H'FF00
On-chip RAM
(128 bytes)
Internal I/O
registers 2
On-chip RAM
*
Internal I/O
registers 1
H'E080
H'FEFF
H'FFFF
H'FE50
H'FF7F
H'FF80
H'FF00
On-chip RAM
(128 bytes)
*
External address
space
Reserved area
H'F800
H'FE4F
H'F7FF
H'EFFF
H'F000
Figure 3.10 Address Map for H8S/2148B (2)