Datasheet

Rev. 3.00 Mar 21, 2006 page viii of liv
Item Page Revision (See Manual for Details)
1.3.1 Pin
Arrangement
Figure 1.3 Pin
Arrangement of
H8S/2140B,
H8S/2141B,
H8S/2145B, and
H8S/2148B
5 Note amended
Note: * The LPC function and the WUE pin function are not
supported by the H8S/2148B
and H8S/2145B (5-V version).
1.3.2 Pin Functions in
Each Operating Mode
Table 1.1 Pin
Functions of
H8S/2140B,
H8S/2141B,
H8S/2145B, and
H8S/2148B in Each
Operating Mode
11 Note * amended
Note: * The LPC function and the WUE pin function are not
supported by the H8S/2148B
and H8S/2145B (5-V version).
2.4.4 Condition-Code
Register (CCR)
36 Table amended
Interrupt Mask Bit
Masks interrupts when set to 1. NMI is accepted …
2.6.1 Table of
Instructions Classified
by Function
Table 2.7 Bit
Manipulation
Instructions (1)
46 Table amended
Instruction Size
*
Function
BIAND B C ∧
[~(<bit-No.> of <EAd>)] → C
Logically ANDs the carry flag with the inverse of a specified bit in a
general register or memory operand and stores the result in the carry
flag.
The bit number is specified by 3-bit immediate data.
BIOR B C ∨ [∼(<bit-No.> of <EAd>)] → C
Logically ORs the carry flag with the inverse of a specified bit in a
general register or memory operand and stores the result in the carry
flag.
The bit number is specified by 3-bit immediate data.
2.7.5 Absolute
Address—@aa:8,
@aa:16, @aa:24, or
@aa:32
53 Description amended
… absolute address, the upper
24 bits are all assumed …