Datasheet

Appendix A Instruction Set
Rev. 4.00 Sep 27, 2006 page 930 of 1130
REJ09B0327-0400
Mnemonic
Addressing Mode and
Instruction Length (Bytes)
#xx Rn @ERn @(d,ERn) @-ERn/@ERn+ @aa @(d,PC) @@aa —
IHNZVC
DAS
MULXU
MULXS
DIVXU
DIVXS
CMP
NEG
EXTU
EXTS
TAS
DAS Rd
MULXU.B Rs,Rd
MULXU.W Rs,ERd
MULXS.B Rs,Rd
MULXS.W Rs,ERd
DIVXU.B Rs,Rd
DIVXU.W Rs,ERd
DIVXS.B Rs,Rd
DIVXS.W Rs,ERd
CMP.B #xx:8,Rd
CMP.B Rs,Rd
CMP.W #xx:16,Rd
CMP.W Rs,Rd
CMP.L #xx:32,ERd
CMP.L ERs,ERd
NEG.B Rd
NEG.W Rd
NEG.L ERd
EXTU.W Rd
EXTU.L ERd
EXTS.W Rd
EXTS.L ERd
TAS @ERd
*3
Rd8 decimal adjust →Rd8
Rd8×Rs8→Rd16 (unsigned
multiplication)
Rd16×Rs16→ERd32 (unsigned
multiplication)
Rd8×Rs8→Rd16 (signed
multiplication)
Rd16×Rs16→ERd32 (signed
multiplication)
Rd16÷Rs8→Rd16
(RdH: remainder, RdL: quotient)
(unsigned division)
ERd32÷Rs16→ERd32
(Ed: remainder, Rd: quotient)
(unsigned division)
Rd16÷Rs8→Rd16
(RdH: remainder, RdL: quotient)
(signed division)
ERd32÷Rs16→ERd32
(Ed: remainder, Rd: quotient)
(signed division)
Rd8-#xx:8
Rd8-Rs8
Rd16-#xx:16
Rd16-Rs16
ERd32-#xx:32
ERd32-ERs32
0-Rd8→Rd8
0-Rd16→Rd16
0-ERd32→ERd32
0 → (<bits 15 to 8> of Rd16)
0 → (<bits 31 to 16> of ERd32)
(<bit 7> of Rd16) →
(<bits 15 to 8> of Rd16)
(<bit 15> of ERd32) →
(<bits 31 to 16> of ERd32)
@ERd-0 → CCR set, (1) →
(<bit 7> of @ERd)
B
B
W
B
W
B
W
B
W
B
B
W
W
L
L
B
W
L
W
L
W
L
B
2
2
2
4
4
2
2
4
4
2
2
2
2
2
2
2
2
2
2
1
12
20
13
21
12
20
13
21
1
1
2
1
3
1
1
1
1
1
1
1
1
4
——
Operation
Condition Code
No. of
States
*
1
Normal Advanced
*
Size
*
4
2
4
6
————— —
————— —
——— —
——— —
[7] ———[6] —
[7] ———[6] —
[7] ———[8] —
[7] ———[8] —
—
—
— [3]
— [3]
— [4]
— [4]
—
—
—
——— 00
——— 00
——— 0
——— 0
——— 0