Datasheet

Section 26 Electrical Characteristics
Rev. 4.00 Sep 27, 2006 page 839 of 1130
REJ09B0327-0400
Item Symbol Min Typ Max Unit
Test
Conditions
RES (4) C
in
— — 80 pFInput
capacitance
NMI — — 50 pF
P52, P97,
P42, P86
PA7 to PA2
— — 20 pF
V
in
= 0 V,
f = 1 MHz,
T
a
= 25°C
Input pins except
(4) above
— — 15 pF
Normal operation I
CC
— 75 100 mA f = 20 MHzCurrent
dissipation
*
9
Sleep mode — 60 85 mA f = 20 MHz
Standby mode
*
10
— 0.01 5.0 µA T
a
≤ 50°C
— — 20.0 µA 50°C < T
a
During A/D, D/A
conversion
Al
CC
—1.22.0mAAnalog
power
supply
current
Idle — 0.01 5.0 µA AV
CC
= 2.0 V
to 5.5 V
During A/D conversion Al
ref
—0.51.0mAReference
power
supply
current
During A/D, D/A
conversion
—2.05.0mA
Idle — 0.01 5.0 µA AV
ref
= 2.0 V
to AV
CC
Analog power supply voltage
*
1
AV
CC
4.5 — 5.5 V Operating
2.0 — 5.5 V Idle/not used
RAM standby voltage V
RAM
2.0 — — V
Notes: 1. Do not leave the AVCC, AV
ref
, and AVSS pins open even if the A/D converter and
D/A converter are not used.
Even if the A/D converter and D/A converter are not used, apply a value in the range
2.0 V to 5.5 V to AVCC and AV
ref
pins by connection to the power supply (V
CC
), or some
other method. Ensure that AV
ref
≤ AV
CC
.
2. P67 to P60 include supporting module inputs multiplexed on those pins.
3. IRQ2 includes the ADTRG signal multiplexed on that pin.
4. In the H8S/2147N, P52/SCK0/SCL0 and P97/SDA0 are NMOS push-pull outputs.
An external pull-up resistor is necessary to provide high-level output from SCL0 and
SDA0 (ICE = 1).
In the H8S/2147N, P52/SCK0 and P97 (ICE = 0) high levels are driven by NMOS.
5. When IICS = 0, ICE = 0, and KBIOE = 0. Low-level output when the bus drive function
is selected is determined separately.