Datasheet

Section 24 Clock Pulse Generator
Rev. 4.00 Sep 27, 2006 page 736 of 1130
REJ09B0327-0400
24.3.2 External Clock Input
Circuit Configuration
An external clock signal can be input as shown in the examples in figure 24.5. If the XTAL pin is
left open, make sure that stray capacitance is no more than 10 pF.
In example (b), make sure that the external clock is held high in standby mode, subactive mode,
subsleep mode, and watch mode.
EXTAL
XTAL
External clock input
Open
(a) XTAL pin left open
EXTAL
XTAL
External clock input
(b) Complementary clock input at XTAL pin
Figure 24.5 External Clock Input (Examples)