Datasheet

Section 20 A/D Converter
Rev. 4.00 Sep 27, 2006 page 614 of 1130
REJ09B0327-0400
20.1.2 Block Diagram
Figure 20.1 shows a block diagram of the A/D converter.
Module data bus
Control circuit
Internal
data bus
10-bit D/A
Comparator
+
Sample-and-
hold circuit
φ/8
φ/16
ADI interrupt
signal
Bus interface
ADCSR
ADCR
ADDRD
ADDRC
ADDRB
ADDRA
AVCC
AVref
AVSS
AN0
AN1
AN2
AN3
AN4
AN5
AN6/CIN0 to CIN7
AN7/CIN8 to CIN15
ADTRG
Conversion start
trigger from 8-bit
timer
Successive approximations
register
Multiplexer
Legend:
ADCR: A/D control register
ADCSR: A/D control/status register
ADDRA: A/D data register A
ADDRB: A/D data register B
ADDRC: A/D data register C
ADDRD: A/D data register D
Figure 20.1 Block Diagram of A/D Converter