Datasheet

Section 17 Keyboard Buffer Controller
Rev. 4.00 Sep 27, 2006 page 563 of 1130
REJ09B0327-0400
17.2 Register Descriptions
17.2.1 Keyboard Control Register H (KBCRH)
Bit 76543210
KBIOE KCLKI KDI KBFSEL KBIE KBF PER KBS
Initial value01110000
Read/Write R/W R R R/W R/W R/(W)
*
R/(W)
*
R
Note: * Only 0 can be written, to clear the flags.
KBCRH is an 8-bit readable/writable register that indicates the operating status of the keyboard
buffer controller.
KBCRH is initialized to H'70 by a reset, and in standby mode, watch mode, subactive mode,
subsleep mode, and module stop mode. Bits 6, 5, and 2 to 0 are also initialized when KBIOE is
cleared to 0.
Bit 7—Keyboard In/Out Enable (KBIOE): Selects whether or not the keyboard buffer
controller is used. When KBIOE is set to 1, the keyboard buffer controller is enabled for
transmission and reception and the port pins function as KCLK and KD I/O pins. When KBIOE is
cleared to 0, the keyboard buffer controller stops functioning and the port pins go to the high-
impedance state.
Bit 7
KBIOE Description
0 The keyboard buffer controller is non-operational (KCLK and KD signal pins have
port functions) (Initial value)
1 The keyboard buffer controller is enabled for transmission and reception (KCLK and
KD signal pins are in the bus drive state)
Bit 6—Keyboard Clock In (KCLKI): Monitors the KCLK I/O pin. This bit cannot be modified.
Bit 6
KCLKI Description
0 KCLK I/O pin is low
1 KCLK I/O pin is high (Initial value)