Datasheet

Section 12 8-Bit Timers
Rev. 4.00 Sep 27, 2006 page 354 of 1130
REJ09B0327-0400
TCSR0
Bit 4—A/D Trigger Enable (ADTE): Enables or disables A/D converter start requests by
compare-match A.
Bit 4
ADTE Description
0 A/D converter start requests by compare-match A are disabled (Initial value)
1 A/D converter start requests by compare-match A are enabled
TCSR1
Bit 4—Reserved: This bit cannot be modified and is always read as 1.
TCSRX
Bit 4—Input Capture Flag (ICF): Status flag that indicates detection of a rising edge followed
by a falling edge in the external reset signal after the ICST bit in TCONRI has been set to 1.
Bit 4
ICF Description
0 [Clearing condition]
Read ICF when ICF = 1, then write 0 in ICF
(Initial value)
1 [Setting condition]
When a rising edge followed by a falling edge is detected in the external reset signal
after the ICST bit in TCONRI has been set to 1
TCSRY
Bit 4—Input Capture Interrupt Enable (ICIE): Selects enabling or disabling of the interrupt
request by ICF (ICIX) when the ICF bit in TCSRX is set to 1.
Bit 4
ICIE Description
0 Interrupt request by ICF (ICIX) is disabled (Initial value)
1 Interrupt request by ICF (ICIX) is enabled