Datasheet

Section 9 8-Bit PWM Timers
Rev. 4.00 Sep 27, 2006 page 283 of 1130
REJ09B0327-0400
Table 9.3 Resolution, PWM Conversion Period, and Carrier Frequency when φ
φφ
φ = 20 MHz
Internal Clock
Frequency Resolution
PWM Conversion
Period Carrier Frequency
φ 50 ns 12.8 µs 1250 kHz
φ/2 100 ns 25.6 µs 625 kHz
φ/4 200 ns 51.2 µs 312.5 kHz
φ/8 400 ns 102.4 µs 156.3 kHz
φ/16 800 ns 204.8 µs 78.1 kHz
Bit 5—Reserved: This bit is always read as 1 and cannot be modified.
Bit 4—Reserved: This bit is always read as 0 and cannot be modified.
Bits 3 to 0—Register Select (RS3 to RS0): These bits select the PWM data register.
Bit 3 Bit 2 Bit 1 Bit 0
RS3 RS2 RS1 RS0 Register Selection
0000 PWDR0 selected
1 PWDR1 selected
1 0 PWDR2 selected
1 PWDR3 selected
1 0 0 PWDR4 selected
1 PWDR5 selected
1 0 PWDR6 selected
1 PWDR7 selected
1000 PWDR8 selected
1 PWDR9 selected
1 0 PWDR10 selected
1 PWDR11 selected
1 0 0 PWDR12 selected
1 PWDR13 selected
1 0 PWDR14 selected
1 PWDR15 selected