Datasheet

Section 8 I/O Ports
Rev. 4.00 Sep 27, 2006 page 212 of 1130
REJ09B0327-0400
Expanded Modes Single-Chip Mode
Port Description Pins
Mode 1
Mode 2, Mode 3
(EXPE = 1)
Mode 2, Mode 3
(EXPE = 0)
Port 7 • 8-bit I/O port P77/AN7/DA1
P76/AN6/DA0
P75/AN5
P74/AN4
P73/AN3
P72/AN2
P71/AN1
P70/AN0
Input port also functioning as A/D converter analog input (AN7 to
AN0) and D/A converter analog output (DA1, DA0)
Port 8 • 7-bit I/O port P86/IRQ5/SCK1/
SCL1
P85/IRQ4/RxD1
P84/IRQ3/TxD1
P83
P82/HIFSD
P81/CS2/GA20
P80/HA0
I/O port also functioning as external
interrupt input (IRQ5, IRQ4, IRQ3),
SCI1 input/output (TxD1, RxD1,
SCK1), and I
2
C bus interface 1
(option) input/output (SCL1)
I/O port also functioning as
external interrupt input
(IRQ5, IRQ4, IRQ3), SCI1
input/output (TxD1, RxD1,
SCK1), host interface
control input/output (CS2,
GA20, HA0, HIFSD), and
I
2
C bus interface 1 (option)
input/output (SCL1)
Port 9 • 8-bit I/O port P97/WAIT/SDA0 I/O port also functioning as
expanded data bus control input
(WAIT) and I
2
C bus interface 0
(option) input/output (SDA0)
I/O port also functioning as
I
2
C bus interface 0 (option)
input/output (SDA0)
P96/φ/EXCL When DDR =
0: input port or
EXCL input
When DDR =
1 (after reset):
φ output
When DDR = 0 (after reset): input port or EXCL
input
When DDR = 1: φ output
P95/AS/IOS/CS1
P94/HWR/IOW
P93/RD/IOR
Expanded data bus control output
(AS/IOS, HWR, RD)
I/O port also functioning as
host interface control input
(CS1, IOW, IOR)