Datasheet
Rev. 4.00 Sep 27, 2006 page xxiii of xliv
Item Page Revision (See Manual for Details)
B.3 Functions 1025 EBR1H'FF82 Flash Memory
EBR2H'FF83 Flash Memory
Figure amended
Read/Write description of bits 7 to 2 (Before)
*
2
→ (After)
7
—
0
—
6
—
0
—
5
—
0
—
4
—
0
—
3
—
0
—
0
EB8/—
*
2
0
R/W
*
1
*
2
2
—
0
—
1
EB9/—
*
2
0
R/W
*
1
*
2
Bit
EBR1
Initial value
Read/Write
7
EB7
0
R/W
*
1
6
EB6
0
R/W
5
EB5
0
R/W
4
EB4
0
R/W
3
EB3
0
R/W
0
EB0
0
R/W
2
EB2
0
R/W
1
EB1
0
R/W
Bit
EBR2
Initial value
Read/Write
1030 ICCR1H'FF88 IIC1
ICCR0H'FFD8 IIC0
Figure amended
I
2
C bus interface enable
0
I
2
C bus interface module disabled, with
SCL and SDA signal pins set to port
function
SAR and SARX can be accessed
1I
2
C bus interface module enabled for
transfer operations (pins SCL and SDA
are driving the bus)
ICMR and ICDR can be accessed
1059 SYSCRH'FFC4 System
Figure amended
IOS enable
Note: * In the H8S/2148 F-ZTAT A-mask version and H8S/2147 F-ZTAT A-mask version,
the address range is from H'(FF)F000 to H'(FF)F7FF.
0
The AS/IOS pin functions as the address strobe pin
(Low output when accessing an external area)
1 The AS/IOS pin functions as the I/O strobe pin
(Low output when accessing a specified address from H'(FF)F000 to H'(FF)FE4F)
*