Section 6 Bus Controller
Rev. 4.00 Sep 27, 2006 page 170 of 1130
REJ09B0327-0400
Bus cycle
T
1
T
2
Address bus
φ
AS/IOS (IOSE = 1)
AS/IOS (IOSE = 0)
RD
D15 to D8
Valid
D7 to D0
Valid
Read
HWR
LWR
D15 to D8
Valid
D7 to D0
Valid
Write
T
3
Figure 6.12 16-Bit, 3-State Access Space Bus Timing (3)
(Word Access)
