Datasheet

Section 6 Bus Controller
Rev. 4.00 Sep 27, 2006 page 162 of 1130
REJ09B0327-0400
6.4.3 Valid Strobes
Table 6.5 shows the data buses used and valid strobes for the access spaces.
In a read, the RD signal is valid without discrimination between the upper and lower halves of the
data bus.
In a write, the HWR signal is valid for the upper half of the data bus, and the LWR signal for the
lower half.
Table 6.5 Data Buses Used and Valid Strobes
Area
Access
Size
Read/
Write Address
Valid
Strobe
Upper Data Bus
(D15 to D8)
Lower Data Bus
(D7 to D0)
Byte Read — RD Valid Port, etc.
8-bit access
space
Write — HWR Port, etc.
Byte Read Even RD Valid Invalid16-bit access
space
Odd Invalid Valid
Write Even HWR Valid Undefined
Odd LWR Undefined Valid
Word Read — RD Valid Valid
Write — HWR, LWR Valid Valid
Legend:
Undefined: Undefined data is output.
Invalid: Input state; input value is ignored.
Port, etc.: Pins are used as port or on-chip supporting module input/output pins, and not as data
bus pins.