Datasheet

Section 3 MCU Operating Modes
Rev. 4.00 Sep 27, 2006 page 99 of 1130
REJ09B0327-0400
H'01FFFF
H'020000
H'000000
H'00FFFF
H'01FFFF
H'000000
H'FFEFFF
H'FFE080
H'FFE880
H'FFFEFF
H'FFFFFF
H'FFFE50
H'FFFF7F
H'FFFF80
H'FFFF00
H'FFEFFF
H'FFE080
H'FFFEFF
H'FFFE50
H'FFFF7F
H'FFFF80
H'FFFF00
H'FFFFFF
Mode 2/EXPE = 0
(advanced single-chip mode)
On-chip ROM
Reserved area
External address
space
Mode 2/EXPE = 1
(advanced expanded mode
with on-chip ROM enabled)
Internal I/O registers 2
On-chip RAM
*
Reserved area
*
Internal I/O registers 1
On-chip RAM
(128 bytes)
*
External address
space
H'FFE880
On-chip RAM
Reserved area
H'00FFFF
On-chip ROM
Reserved area
Internal I/O registers 2
Internal I/O registers 1
On-chip RAM
(128 bytes)
Note: * External addresses can be accessed by clearing the RAME bit in SYSCR to 0.
Figure 3.4 H8S/2147 (Except for F-ZTAT A-Mask Version), H8S/2147N, and H8S/2142
Memory Map in Each Operating Mode (cont)