Datasheet

Appendix C I/O Port Block Diagrams
Rev. 4.00 Sep 27, 2006 page 1117 of 1130
REJ09B0327-0400
D
R
QD
P97DR
C
Reset
R
Q
P97DDR
C
Reset
WP9D
EXPE
WP9
IIC0
SDA0 input
SDA0 output
Transmit enable
Bus controller
Input enable
WAIT input
P97
Hardware standby
RP9
WP9D: Write to P9DDR
WP9: Write to port 9
RP9: Read port 9
Notes: 1. Output enable signal
2. Open drain control signal
*
1
*
2
Internal data bus
Legend:
Figure C.33 Port 9 Block Diagram (Pin P97)