Appendix C I/O Port Block Diagrams
Rev. 4.00 Sep 27, 2006 page 1116 of 1130
REJ09B0327-0400
D
RS
Q
P96DDR
C
Reset
Mode 1
WP9D
Subclock input
ΓΈ output
Subclock input
enable
P96
WP9D: Write to P9DDR
RP9: Read port 9
RP9
Internal data bus
Hardware
standby
Legend:
Figure C.32 Port 9 Block Diagram (Pin P96)
