Datasheet

Appendix C I/O Port Block Diagrams
Rev. 4.00 Sep 27, 2006 page 1088 of 1130
REJ09B0327-0400
R
QD
D
P2nPCR
C
Reset
R
QD
P2nDR
C
Reset
WP2P
R
Q
P2nDDR
C
Reset
WP2D
WP2
8-bit PWM
PWM output enable
PWM output
P2n
*
RP2P
RP2
Mode 2, 3
EXPE
IOSE
WP2P: Write to P2PCR
WP2D: Write to P2DDR
WP2: Write to port 2
RP2P: Read P2PCR
RP2: Read port 2
Notes: n = 4 to 6
* Set priority
Internal data bus
Internal address bus
Hardware
standby
Mode 1
Mode 1
Legend:
Figure C.3 Port 2 Block Diagram (Pins P24 to P26)