Datasheet

Appendix B Internal I/O Registers
Rev. 4.00 Sep 27, 2006 page 1070 of 1130
REJ09B0327-0400
PWDR0 to PWDR15—PWM Data Registers H'FFD7 PWM
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
Specifies duty factor of basic output pulse and number of additional pulses
0
0
R/W
2
0
R/W
1
0
R/W
Bit
Initial value
Read/Write
ADDRAH—A/D Data Register AH H'FFE0 A/D Converter
ADDRAL—A/D Data Register AL H'FFE1 A/D Converter
ADDRBH—A/D Data Register BH H'FFE2 A/D Converter
ADDRBL—A/D Data Register BL H'FFE3 A/D Converter
ADDRCH—A/D Data Register CH H'FFE4 A/D Converter
ADDRCL—A/D Data Register CL H'FFE5 A/D Converter
ADDRDH—A/D Data Register DH H'FFE6 A/D Converter
ADDRDL—A/D Data Register DL H'FFE7 A/D Converter
14
AD8
0
R
12
AD6
0
R
10
AD4
0
R
8
AD2
0
R
6
AD0
0
R
0
—
0
R
4
—
0
R
2
—
0
R
15
AD9
0
R
13
AD7
0
R
11
AD5
0
R
9
AD3
0
R
7
AD1
0
R
1
—
0
R
5
—
0
R
3
—
0
R
Bit
Initial value
Read/Write
ADDRH
Stores A/D data
Correspondence between analog input channels and ADDR registers
ADDRL
ADDRA
ADDRB
ADDRC
ADDRD
Group 0
AN0
AN1
AN2
AN3
Group 1
AN4
AN5
AN6 or CIN0 to CIN7
AN7 or CIN8 to CIN15
Analog Input Channel
A/D Data Register