Datasheet

Appendix B Internal I/O Registers
Rev. 4.00 Sep 27, 2006 page 1056 of 1130
REJ09B0327-0400
P8DR—Port 8 Data Register H'FFBF Port 8
7
—
1
—
6
P86DR
0
R/W
5
P85DR
0
R/W
4
P84DR
0
R/W
3
P83DR
0
R/W
0
P80DR
0
R/W
2
P82DR
0
R/W
1
P81DR
0
R/W
Bit
Initial value
Read/Write
Output data for port 8 pins
P9DDR—Port 9 Data Direction Register H'FFC0 Port 9
7
P97DDR
0
W
0
W
6
P96DDR
1
W
0
W
5
P95DDR
0
W
0
W
4
P94DDR
0
W
0
W
3
P93DDR
0
W
0
W
0
P90DDR
0
W
0
W
2
P92DDR
0
W
0
W
1
P91DDR
0
W
0
W
Bit
Mode 1
Initial value
Read/Write
Modes 2 and 3
Initial value
Read/Write
Specification of input or output for port 9 pins
P9DR—Port 9 Data Register H'FFC1 Port 9
7
P97DR
0
R/W
6
P96DR
—*
R
5
P95DR
0
R/W
4
P94DR
0
R/W
3
P93DR
0
R/W
0
P90DR
0
R/W
2
P92DR
0
R/W
1
P91DR
0
R/W
Bit
Initial value
Read/Write
Note: * Determined by state of pin P96.
Output data for port 9 pins