Datasheet

Appendix B Internal I/O Registers
Rev. 4.00 Sep 27, 2006 page 1047 of 1130
REJ09B0327-0400
DACR—PWM (D/A) Control Register H'FFA0 PWMX
7
TEST
0
R/W
6
PWME
0
R/W
5
—
1
—
4
—
1
—
3
OEB
0
R/W
0
CKS
0
R/W
2
OEA
0
R/W
1
OS
0
R/W
Bit
Initial value
Read/Write
Clock select
0 Operates at resolution (T) =
system clock cycle time (t
cyc
)
1 Operates at resolution (T) =
system clock cycle time (t
cyc
) × 2
Output select
0 Direct PWM output
1 Inverted PWM output
Output enable A
0 PWM (D/A) channel A output
(PWX0 output pin) disabled
1 PWM (D/A) channel A output
(PWX0 output pin) enabled
Output enable B
0 PWM (D/A) channel B output
(PWX1 output pin) disabled
1 PWM (D/A) channel B output
(PWX1 output pin) enabled
PWM enable
0 DACNT operates as a 14-bit up-counter
1 DACNT halts at H'0003
Test mode
0 PWM (D/A) in user state: normal operation
1 PWM (D/A) in test state: correct conversion results unobtainable