Datasheet

Appendix B Internal I/O Registers
Rev. 4.00 Sep 27, 2006 page 1046 of 1130
REJ09B0327-0400
DADRAH—PWM (D/A) Data Register AH H'FFA0 PWMX
DADRAL—PWM (D/A) Data Register AL H'FFA1 PWMX
DADRBH—PWM (D/A) Data Register BH H'FFA6 PWMX
DADRBL—PWM (D/A) Data Register BL H'FFA7 PWMX
15
13
DA13
1
R/W
14
12
DA12
1
R/W
13
11
DA11
1
R/W
12
10
DA10
1
R/W
11
9
DA9
1
R/W
8
6
DA6
1
R/W
10
8
DA8
1
R/W
9
7
DA7
1
R/W
Bit (CPU)
Bit (data)
DADRA
Initial value
Read/Write
7
5
DA5
1
R/W
6
4
DA4
1
R/W
5
3
DA3
1
R/W
4
2
DA2
1
R/W
3
1
DA1
1
R/W
0
—
—
1
—
2
0
DA0
1
R/W
1
—
CFS
1
R/W
DADRH
DADRL
DA13
1
R/W
DA12
1
R/W
DA11
1
R/W
DA10
1
R/W
DA9
1
R/W
DA6
1
R/W
DA8
1
R/W
DA7
1
R/W
DADRB
Initial value
Read/Write
DA5
1
R/W
DA4
1
R/W
DA3
1
R/W
DA2
1
R/W
DA1
1
R/W
REGS
1
R/W
DA0
1
R/W
CFS
1
R/W
Register select (DADRB only)
0 DADRA and DADRB can be accessed
1 DACR and DACNT can be accessed
Carrier frequency select
0 Base cycle = resolution (T)
×
64 DADR range
is H'0401 to H'FFFD
1 Base cycle = resolution (T)
×
256 DADR range
is H'0103 to H'FFFF
D/A conversion data