Datasheet

Appendix B Internal I/O Registers
Rev. 4.00 Sep 27, 2006 page 1028 of 1130
REJ09B0327-0400
MSTPCRH—Module Stop Control Register H H'FF86 System
MSTPCRL—Module Stop Control Register L H'FF87 System
7
MSTP15
0
R/W
Bit
Initial value
Read/Write
6
MSTP14
0
R/W
5
MSTP13
1
R/W
4
MSTP12
1
R/W
3
MSTP11
1
R/W
2
MSTP10
1
R/W
1
MSTP9
1
R/W
0
MSTP8
1
R/W
7
MSTP7
1
R/W
6
MSTP6
1
R/W
5
MSTP5
1
R/W
4
MSTP4
1
R/W
3
MSTP3
1
R/W
2
MSTP2
1
R/W
1
MSTP1
1
R/W
0
MSTP0
1
R/W
MSTPCRH MSTPCRL
Module stop
0 Module stop mode is cleared
1 Module stop mode is set
MSTP15
MSTP14
*
MSTP13
MSTP12
MSTP11
MSTP10
MSTP9
MSTP8
MSTP7
MSTP6
MSTP5
MSTP4
*
MSTP3
*
MSTP2
*
MSTP1
*
MSTP0
*
—
Data transfer controller (DTC)
16-bit free-running timer (FRT)
8-bit timers (TMR0, TMR1)
8-bit PWM timer (PWM), 14-bit PWM timer (PWMX)
D/A converter
A/D converter
8-bit timers (TMRX, TMRY), timer connection
Serial communication interface 0 (SCI0)
Serial communication interface 1 (SCI1)
Serial communication interface 2 (SCI2)
I
2
C bus interface (IIC) channel 0 (option)
I
2
C bus interface (IIC) channel 1 (option)
Host interface (HIF), keyboard buffer controller (PS2)
—
—
MSTPCRH
MSTPCRL
Register Bit Module
The correspondence between MSTPCR bits and on-chip supporting modules is shown below.
Notes: Do not set bit 15 to 1. Bits 1 and 0 can be read and written but do not affect operation.
* Must be set to 1 in the H8S/2144 Group.