Datasheet

Appendix A Instruction Set
Rev. 4.00 Sep 27, 2006 page 989 of 1130
REJ09B0327-0400
Instruction123456789
SUBS #1/2/4,ERd R:W NEXT
SUBX #xx:8,Rd R:W NEXT
SUBX Rs,Rd R:W NEXT
TAS @ERd
*
8
R:W 2nd R:W NEXT R:B:M EA W:B EA
TRAPA
#x:2
Advanced R:W NEXT Internal
operation,
1 state
W:W
Stack (L)
W:W
Stack (H)
W:W
Stack
(EXR)
R:W:M
VEC
R:W
VEC+2
Internal
operation,
1 state
R:W
*
7
XOR.B #xx8,Rd R:W NEXT
XOR.B Rs,Rd R:W NEXT
XOR.W #xx:16,Rd R:W 2nd R:W NEXT
XOR.W Rs,Rd R:W NEXT
XOR.L #xx:32,ERd R:W 2nd R:W 3rd R:W NEXT
XOR.L ERs,ERd R:W 2nd R:W NEXT
XORC #xx:8,CCR R:W NEXT
XORC #xx:8,EXR R:W 2nd R:W NEXT
Reset
excep-
tion
handling
Advanced R:W:M
VEC
R:W
VEC+2
Internal
operation,
1 state
R:W
*
5
Interrupt
excep-
tion
handling
Advanced R:W
*
6
Internal
operation,
1 state
W:W
Stack (L)
W:W
Stack (H)
W:W
Stack
(EXR)
R:W:M
VEC
R:W
VEC+2
Internal
operation,
1 state
R:W
*
7
Notes: 1. EAs is the contents of ER5. EAd is the contents of ER6.
2. EAs is the contents of ER5. EAd is the contents of ER6. Both registers are incremented
by 1 after execution of the instruction. n is the initial value of R4L or R4. If n = 0, these
bus cycles are not executed.
3. Repeated two times to save or restore two registers, three times for three registers, or
four times for four registers.
4. Start address after return.
5. Start address of the program.
6. Prefetch address, equal to two plus the PC value pushed onto the stack. In recovery
from sleep mode or software standby mode the read operation is replaced by an
internal operation.
7. Start address of the interrupt-handling routine.
8. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
9. Only registers ER0 to ER6 should be used when using the STM/LDM instruction.