Datasheet

Section 20 A/D Converter
Rev. 4.00 Sep 27, 2006 page 616 of 1130
REJ09B0327-0400
20.1.4 Register Configuration
Table 20.2 summarizes the registers of the A/D converter.
Table 20.2 A/D Converter Registers
Name Abbreviation R/W Initial Value Address
*
1
A/D data register AH ADDRAH R H'00 H'FFE0
A/D data register AL ADDRAL R H'00 H'FFE1
A/D data register BH ADDRBH R H'00 H'FFE2
A/D data register BL ADDRBL R H'00 H'FFE3
A/D data register CH ADDRCH R H'00 H'FFE4
A/D data register CL ADDRCL R H'00 H'FFE5
A/D data register DH ADDRDH R H'00 H'FFE6
A/D data register DL ADDRDL R H'00 H'FFE7
A/D control/status register ADCSR R/(W)
*
2
H'00 H'FFE8
A/D control register ADCR R/W H'3F H'FFE9
Module stop control register MSTPCRH R/W H'3F H'FF86
MSTPCRL R/W H'FF H'FF87
Keyboard comparator control
register
KBCOMP R/W H'00 H'FEE4
Notes: 1. Lower 16 bits of the address.
2. Only 0 can be written in bit 7, to clear the flag.
20.2 Register Descriptions
20.2.1 A/D Data Registers A to D (ADDRA to ADDRD)
15
AD9
0
R
Bit
Initial value
Read/Write
14
AD8
0
R
13
AD7
0
R
12
AD6
0
R
11
AD5
0
R
10
AD4
0
R
9
AD3
0
R
8
AD2
0
R
7
AD1
0
R
6
AD0
0
R
5
—
0
R
4
—
0
R
3
—
0
R
2
—
0
R
1
—
0
R
0
—
0
R
There are four 16-bit read-only ADDR registers, ADDRA to ADDRD, used to store the results of
A/D conversion.