Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFP 100 (14x14) 16-Bit 20 MHz I/O number 74

Appendix C I/O Port Block Diagrams

Rev. 4.00 Sep 27, 2006 page 1100 of 1130

REJ09B0327-0400

D

R

QD

P52DR

C

Reset

R

Q

P52DDR

C

Reset

WP5D

*

1

*

2

WP5

SCI0

Input enable

Clock output

SCL0 output

SCL0 input

Transmit enable

Output enable

Clock input

IIC0

P52

Hardware standby

RP5

WP5D: Write to P5DDR

WP5: Write to port 5

RP5: Read port 5

Notes: 1. Output enable signal

2. Open drain control signal

Legend:

Internal data bus

Figure C.15 Port 5 Block Diagram (Pin P52)