Datasheet

Appendix B Internal I/O Registers
Rev. 4.00 Jun 06, 2006 page 922 of 1004
REJ09B0301-0400
TIER—Timer Interrupt Enable Register H'FF90 FRT
7
ICIAE
0
R/W
6
ICIBE
0
R/W
5
ICICE
0
R/W
4
ICIDE
0
R/W
3
OCIAE
0
R/W
0
—
1
—
2
OCIBE
0
R/W
1
OVIE
0
R/W
Bit
Initial value
Read/Write
Input capture interrupt A enable
0 Input capture interrupt request A (ICIA) is disabled
1 Input capture interrupt request A (ICIA) is enabled
Input capture interrupt B enable
0 Input capture interrupt request B (ICIB) is disabled
1 Input capture interrupt request B (ICIB) is enabled
Input capture interrupt C enable
0 Input capture interrupt request C (ICIC) is disabled
1 Input capture interrupt request C (ICIC) is enabled
Input capture interrupt D enable
0 Input capture interrupt request D (ICID) is disabled
1 Input capture interrupt request D (ICID) is enabled
Output compare interrupt A enable
0 Output compare interrupt request A
(OCIA) is disabled
1 Output compare interrupt request A
(OCIA) is enabled
Output compare interrupt B enable
0 Output compare interrupt
request B (OCIB) is disabled
1 Output compare interrupt
request B (OCIB) is enabled
Timer overflow interrupt enable
0 Timer overflow interrupt
request (FOVI) is disabled
1 Timer overflow interrupt
request (FOVI) is enabled