Datasheet

Appendix B Internal I/O Registers
Rev. 4.00 Jun 06, 2006 page 901 of 1004
REJ09B0301-0400
ABRKCR—Address Break Control Register H'FEF4 Interrupt Controller
7
CMF
0
R/W
6
—
0
—
5
—
0
—
4
—
0
—
3
—
0
—
0
BIE
0
R/W
2
—
0
—
1
—
0
—
Bit
Initial value
Read/Write
Break interrupt enable
0 Address break disabled
1 Address break enabled
Condition match flag
0 [Clearing condition]
When address break interrupt exception handling is executed
1 [Setting condition]
When address set by BARA–BARC is prefetched while BIE = 1