Datasheet

Section 24 Power-Down State
Rev. 4.00 Jun 06, 2006 page 686 of 1004
REJ09B0301-0400
Bit 7—Software Standby (SSBY): Determines the operating mode, in combination with other
control bits, when a power-down mode transition is made by executing a SLEEP instruction. The
SSBY setting is not changed by a mode transition due to an interrupt, etc.
Bit 7
SSBY Description
0 Transition to sleep mode after execution of SLEEP instruction in high-speed mode or
medium-speed mode (Initial value)
Transition to subsleep mode after execution of SLEEP instruction in subactive mode
1 Transition to software standby mode, subactive mode, or watch mode after execution
of SLEEP instruction in high-speed mode or medium-speed mode
Transition to watch mode or high-speed mode after execution of SLEEP instruction in
subactive mode
Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the time the MCU
waits for the clock to stabilize when software standby mode, watch mode, or subactive mode is
cleared and a transition is made to high-speed mode or medium-speed mode by means of a
specific interrupt or instruction. With crystal oscillation, refer to table 24.5 and make a selection
according to the operating frequency so that the standby time is at least 8 ms (the oscillation
settling time). With an external clock, any selection can be made.
Bit 6 Bit 5 Bit 4
STS2 STS1 STS0 Description
0 0 0 Standby time = 8192 states (Initial value
)
1 Standby time = 16384 states
1 0 Standby time = 32768 states
1 Standby time = 65536 states
1 0 0 Standby time = 131072 states
1 Standby time = 262144 states
10Reserved
1 Standby time = 16 states
*
Note: * Do not used this setting in the on-chip flash memory version.
Bit 3—Reserved: This bit cannot be modified and is always read as 0.