Datasheet

Section 23 Clock Pulse Generator
Rev. 4.00 Jun 06, 2006 page 674 of 1004
REJ09B0301-0400
23.3.2 External Clock Input
Circuit Configuration: An external clock signal can be input as shown in the examples in figure
23.5. If the XTAL pin is left open, make sure that stray capacitance is no more than 10 pF.
In example (b), make sure that the external clock is held high in standby mode, subactive mode,
subsleep mode, and watch mode.
EXTAL
XTAL
External clock input
Open
(a) XTAL pin left open
EXTAL
XTAL
External clock input
(b) Complementary clock input at XTAL pin
Figure 23.5 External Clock Input (Examples)
External Clock: The external clock signal should have the same frequency as the system clock
(φ).
Table 23.4 and figure 23.6 show the input conditions for the external clock.