Datasheet

Section 21 ROM (Mask ROM Version, H8S/2138 F-ZTAT, H8S/2134 F-ZTAT, and H8S/2132 F-ZTAT)
Rev. 4.00 Jun 06, 2006 page 577 of 1004
REJ09B0301-0400
Section 21 ROM
(Mask ROM Version, H8S/2138 F-ZTAT,
H8S/2134 F-ZTAT, and H8S/2132 F-ZTAT)
21.1 Overview
The H8S/2138 and H8S/2134 have 128 kbytes of on-chip ROM, the H8S/2133 has 96 kbytes, the
H8S/2137 and H8S/2132 have 64 kbytes, and the H8S/2130 has 32 kbytes. The ROM is connected
to the CPU by a 16-bit data bus. The CPU accesses both byte and word data in one state, enabling
faster instruction fetches and higher processing speed.
The mode pins (MD1 and MD0) and the EXPE bit in MDCR can be set to enable or disable the
on-chip ROM.
The lineups for the H8S/2138, H8S/2134, and H8S/2132 include flash memory versions which can
be erased and programmed on-board as well as by a general-purpose PROM programmer.
21.1.1 Block Diagram
Figure 21.1 shows a block diagram of the ROM.
H'000000
H'000002
H'01FFFE
H'000001
H'000003
H'01FFFF
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
Figure 21.1 ROM Block Diagram (H8S/2138, H8S/2134)