Datasheet

Section 19 A/D Converter
Rev. 4.00 Jun 06, 2006 page 559 of 1004
REJ09B0301-0400
Bits 7 and 6—Timer Trigger Select 1 and 0 (TRGS1, TRGS0): These bits select enabling or
disabling of the start of A/D conversion by a trigger signal. Only set bits TRGS1 and TRGS0
while conversion is stopped.
Bit 7 Bit 6
TRGS1 TRGS0 Description
0 0 Start of A/D conversion by external trigger is disabled (Initial value)
1 Start of A/D conversion by external trigger is disabled
1 0 Start of A/D conversion by external trigger (8-bit timer) is enabled
1 Start of A/D conversion by external trigger pin is enabled
Bits 5 to 0—Reserved: Should always be written 1.
Note: Some of these bits are readable/writable in products other than the HD64F2138,
HD64F2134, HD64F2132R, HD6432132, and HD6432130, however, when writing, be
sure to write 1 here for software compatibility.
19.2.4 Keyboard Comparator Control Register (KBCOMP)
Bit 76543210
IrE IrCKS2 IrCKS1 IrCKS0 KBADE KBCH2 KBCH1 KBCH0
Initial value00000000
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
KBCOMP is an 8-bit readable/writable register that controls the SCI2 IrDA function and selects
the CIN input channels for A/D conversion.
KBCOMP is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 to 4—IrDA Control: See the description in section 15.2.11, Keyboard Comparator Control
Register (KBCOMP).
Bit 3—Keyboard A/D Enable: Selects either analog input pin (AN6) or digital input pin (CIN0
to CIN7) for A/D converter channel 6 input. If digital input pins are selected, input on A/D
converter channel 7 will not be converted correctly.
Bits 2 to 0—Keyboard A/D Channel Select 2 to 0 (KBCH2 to KBCH0): These bits select the
channels for A/D conversion from among the digital input pins. Only set the input channel while
A/D conversion is stopped.