Datasheet

Rev. 4.00 Jun 06, 2006 page l of liv
Table 17.8 Fast A20 Gate Output Signals................................................................................ 539
Table 17.9 Scope of HIF Pin Shutdown in Slave Mode........................................................... 540
Table 17.10 Input Buffer Full Interrupts.................................................................................... 541
Table 17.11 HIRQ Setting/Clearing Conditions......................................................................... 541
Section 18 D/A Converter
Table 18.1 Input and Output Pins of D/A Converter Module .................................................. 545
Table 18.2 D/A Converter Registers ........................................................................................ 545
Section 19 A/D Converter
Table 19.1 A/D Converter Pins................................................................................................ 553
Table 19.2 A/D Converter Registers ........................................................................................ 554
Table 19.3 Analog Input Channels and Corresponding ADDR Registers................................ 555
Table 19.4 A/D Conversion Time (Single Mode).................................................................... 566
Table 19.5 Analog Pin Specifications ...................................................................................... 569
Section 20 RAM
Table 20.1 Register Configuration ........................................................................................... 574
Section 21 ROM (Mask ROM Version, H8S/2138 F-ZTAT, H8S/2134 F-ZTAT,
and H8S/2132 F-ZTAT)
Table 21.1 ROM Register ........................................................................................................ 578
Table 21.2 Operating Modes and ROM ................................................................................... 579
Table 21.3 Flash Memory Pins................................................................................................. 586
Table 21.4 Flash Memory Registers......................................................................................... 586
Table 21.5 Flash Memory Erase Blocks................................................................................... 592
Table 21.6 Setting On-Board Programming Modes................................................................. 593
Table 21.7 System Clock Frequencies for which Automatic Adjustment of H8S/2138
or H8S/2134 Group Bit Rate Is Possible................................................................ 596
Table 21.8 Hardware Protection............................................................................................... 605
Table 21.9 Software Protection................................................................................................ 606
Table 21.10 Programmer Mode Pin Settings ............................................................................. 609
Table 21.11 Settings for Each Operating Mode in Programmer Mode...................................... 611
Table 21.12 Programmer Mode Commands .............................................................................. 611
Table 21.13 AC Characteristics in Memory Read Mode ........................................................... 612
Table 21.14 AC Characteristics When Entering Another Mode from Memory Read Mode ..... 613
Table 21.15 AC Characteristics in Memory Read Mode ........................................................... 614
Table 21.16 AC Characteristics in Auto-Program Mode ........................................................... 615
Table 21.17 AC Characteristics in Auto-Erase Mode................................................................ 617
Table 21.18 AC Characteristics in Status Read Mode ............................................................... 618
Table 21.19 Status Read Mode Return Commands.................................................................... 619