Datasheet

Section 12 8-Bit Timers
Rev. 4.00 Jun 06, 2006 page 313 of 1004
REJ09B0301-0400
Bit 5—Timer Overflow Interrupt Enable (OVIE): Selects whether the OVF interrupt request
(OVI) is enabled or disabled when the OVF flag in TCSR is set to 1.
Note that an OVI interrupt is not requested by TMRX, regardless of the OVIE value.
Bit 5
OVIE Description
0 OVF interrupt request (OVI) is disabled (Initial value)
1 OVF interrupt request (OVI) is enabled
Bits 4 and 3—Counter Clear 1 and 0 (CCLR1, CCLR0): These bits select the method by which
the timer counter is cleared: by compare-match A or B, or by an external reset input.
Bit 4 Bit 3
CCLR1 CCLR0 Description
0 0 Clearing is disabled (Initial value)
1 Cleared on compare-match A
1 0 Cleared on compare-match B
1 Cleared on rising edge of external reset input
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select whether the clock input to
TCNT is an internal or external clock.
The input clock can be selected from either six or three clocks, all divided from the system clock
(φ). The falling edge of the selected internal clock triggers the count.
When use of an external clock is selected, three types of count can be selected: at the rising edge,
the falling edge, and both rising and falling edges.
Some functions differ between channel 0 and channel 1, because of the cascading function.