Datasheet

Section 11 16-Bit Free-Running Timer
Rev. 4.00 Jun 06, 2006 page 302 of 1004
REJ09B0301-0400
Switching of Internal Clock and FRC Operation: When the internal clock is changed, the
changeover may cause FRC to increment. This depends on the time at which the clock select bits
(CKS1 and CKS0) are rewritten, as shown in table 11.5.
When an internal clock is used, the FRC clock is generated on detection of the falling edge of the
internal clock scaled from the system clock (φ). If the clock is changed when the old source is high
and the new source is low, as in case no. 3 in table 11.5, the changeover is regarded as a falling
edge that triggers the FRC increment clock pulse.
Switching between an internal and external clock can also cause FRC to increment.
Table 11.5 Switching of Internal Clock and FRC Operation
No.
Timing of Switchover
by Means of CKS1
and CKS0 Bits FRC Operation
1 Switching from
low to low
N + 1
Clock before
switchover
Clock after
switchover
FRC clock
FRC
CKS bit rewrite
N
2 Switching from
low to high
N + 1 N + 2
Clock before
switchover
Clock after
switchover
FRC clock
FRC
CKS bit rewrite
N