Datasheet

Section 11 16-Bit Free-Running Timer
Rev. 4.00 Jun 06, 2006 page 298 of 1004
REJ09B0301-0400
11.6 Usage Notes
Application programmers should note that the following types of contention can occur in the free-
running timer.
Contention between FRC Write and Clear: If an internal counter clear signal is generated
during the state after an FRC write cycle, the clear signal takes priority and the write is not
performed.
Figure 11.18 shows this type of contention.
T
1
T
2
FRC write cycle
Address
FRC address
Internal write
signal
φ
Counter clear
signal
FRC N H'0000
Figure 11.18 FRC Write-Clear Contention