Datasheet

Section 10 14-Bit PWM D/A
Rev. 4.00 Jun 06, 2006 page 259 of 1004
REJ09B0301-0400
10.2.3 PWM D/A Control Register (DACR)
7
TEST
0
R/W
6
PWME
0
R/W
5
—
1
—
4
—
1
—
3
OEB
0
R/W
0
CKS
0
R/W
2
OEA
0
R/W
1
OS
0
R/W
Bit
Initial value
Read/Write
DACR is an 8-bit readable/writable register that selects test mode, enables the PWM outputs, and
selects the output phase and operating speed.
DACR is initialized to H'30 by a reset, and in the standby modes, watch mode, subactive mode,
subsleep mode, and module stop mode.
Bit 7—Test Mode (TEST): Selects test mode, which is used in testing the chip. Normally this bit
should be cleared to 0.
Bit 7
TEST Description
0 PWM (D/A) in user state: normal operation (Initial value)
1 PWM (D/A) in test state: correct conversion results unobtainable
Bit 6—PWM Enable (PWME): Starts or stops the PWM D/A counter (DACNT).
Bit 6
PWME Description
0 DACNT operates as a 14-bit up-counter (Initial value)
1 DACNT halts at H'0003
Bits 5 and 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Output Enable B (OEB): Enables or disables output on PWM D/A channel B.
Bit 3
OEB Description
0 PWM (D/A) channel B output (at the PWX1 pin) is disabled (Initial value)
1 PWM (D/A) channel B output (at the PWX1 pin) is enabled