Datasheet

Section 9 8-Bit PWM Timers [H8S/2138 Group]
Rev. 4.00 Jun 06, 2006 page 249 of 1004
REJ09B0301-0400
9.2.7 Port 2 Data Direction Register (P2DDR)
Bit
Initial value
Read/Write
7
P27DDR
0
W
6
P26DDR
0
W
5
P25DDR
0
W
4
P24DDR
0
W
3
P23DDR
0
W
0
P20DDR
0
W
2
P22DDR
0
W
1
P21DDR
0
W
P2DDR is an 8-bit write-only register that specifies the input/output direction and PWM output for
each pin of port J on a bit-by-bit basis.
Port 2 pins are multiplexed with pins PW8 to PW15. The bit corresponding to a pin to be used for
PWM output should be set to 1.
For details on P2DDR, see section 8.3, Port 2.
9.2.8 Port 1 Data Register (P1DR)
Bit
Initial value
Read/Write
7
P17DR
0
R/W
6
P16DR
0
R/W
5
P15DR
0
R/W
4
P14DR
0
R/W
3
P13DR
0
R/W
0
P10DR
0
R/W
2
P12DR
0
R/W
1
P11DR
0
R/W
P1DR is an 8-bit readable/writable register used to fix PWM output at 1 (when OS = 0) or 0 (when
OS = 1).
For details on P1DR, see section 8.2, Port 1.
9.2.9 Port 2 Data Register (P2DR)
Bit
Initial value
Read/Write
7
P27DR
0
R/W
6
P26DR
0
R/W
5
P25DR
0
R/W
4
P24DR
0
R/W
3
P23DR
0
R/W
0
P20DR
0
R/W
2
P22DR
0
R/W
1
P21DR
0
R/W
P2DR is an 8-bit readable/writable register used to fix PWM output at 1 (when OS = 0) or 0 (when
OS = 1).
For details on P2DR, see section 8.3, Port 2.