Datasheet
Section 4 Exception Handling
Rev. 4.00 Jun 06, 2006 page 95 of 1004
REJ09B0301-0400
Internal
address bus
Internal read
signal
Internal write
signal
Internal data
bus
(1) (3)
Vector
fetch
Internal
processing
Fetch of
first program
instruction
High
(1) Reset exception vector address ((1) = H'0000)
(2) Start address (contents of reset exception vector address)
(3) Start address ((3) = (2))
(4) First program instruction
(2) (4)
φ
RES
Figure 4.2 Reset Sequence (Mode 3)