Datasheet

Section 3 MCU Operating Modes
Rev. 4.00 Jun 06, 2006 page 81 of 1004
REJ09B0301-0400
H'01FFFF
H'020000
H'000000
H'01FFFF
H'000000
H'FFEFFF
H'FFE080
H'FFFEFF
H'FFFFFF
H'FFFE50
H'FFFF7F
H'FFFF80
H'FFFF00
H'FFEFFF
H'FFE080
H'FFFEFF
H'FFFE50
H'FFFF7F
H'FFFF80
H'FFFF00
H'FFFFFF
Mode 2/EXPE = 0
(advanced single-chip mode)
On-chip ROM
External address
space
*
2
On-chip ROM
Mode 2/EXPE = 1
(advanced expanded mode
with on-chip ROM enabled)
Internal I/O registers 2
On-chip RAM
*
1
Internal I/O registers 1
On-chip RAM
(128 bytes)
*
1
External address
space
*
2
Internal I/O registers 2
On-chip RAM
Internal I/O registers 1
On-chip RAM
(128 bytes)
Notes: 1. External addresses can be accessed by clearing the RAME bit in SYSCR to 0.
2. For these models, the maximum number of external address pins is 16. An external address can
only be specified correctly for an area that uses the I/O strobe function.
Figure 3.1 H8S/2138 (Except for F-ZTAT A-Mask Version) and H8S/2134 Memory Map in
Each Operating Mode (cont)