Datasheet

Appendix D Pin States
Rev. 4.00 Jun 06, 2006 page 998 of 1004
REJ09B0301-0400
Port Name
Pin Name
MCU Operating
Mode Reset
Hardware
Standby
Mode
Software
Standby
Mode
Watch
Mode
Sleep
Mode
Sub-
sleep
Mode
Subactive
Mode
Program
Execution
State
1 Clock
output
T
2, 3 (EXPE = 1) T
Port 96
φ
EXCL
2, 3 (EXPE = 0)
[DDR = 1] H
[DDR = 0] T
EXCL
input
[DDR = 1]
clock
output
[DDR = 0] T
EXCL
input
EXCL input Clock output/
EXCL input/
input port
1HTHHHH
2, 3 (EXPE = 1) T
AS, WR, RD AS, WR, RD
Port 95 to 93
AS, WR, RD
2, 3 (EXPE = 0) keep keep keep keep I/O port I/O port
Port 92 to 90 1 T T keep keep keep keep I/O port I/O port
2, 3 (EXPE = 1)
2, 3 (EXPE = 0)
Legend:
H: High
L: Low
T: High-impedance state
keep: Input ports are in the high-impedance state (when DDR = 0 and PCR = 1, MOS input pull-
ups remain on).
Output ports maintain their previous state.
Depending on the pins, the on-chip supporting modules may be initialized and the I/O port
function determined by DDR and DR used.
DDR: Data direction register
Note: * In the case of address output, the last address accessed is retained.