Datasheet

Appendix C I/O Port Block Diagrams
Rev. 4.00 Jun 06, 2006 page 981 of 1004
REJ09B0301-0400
R
QD
D
KMPCR
C
Reset
R
QD
P61DR
C
Reset
WP6P
R
Q
P61DDR
C
Reset
WP6D
WP6
16-bit FRT
FTOA output
Output enable
Timer connection
VSYNCO output
Output enable
A/D converter
Analog input
Key-sense interrupt input
KMIMR1
P61
RP6P
RP6
Legend:
WP6P: Write to P6PCR
WP6D: Write to P6DDR
WP6: Write to port 6
RP6P: Read P6PCR
RP6: Read port 6
Hardware
standby
Internal data bus
Figure C.17 Port 6 Block Diagram (Pin P61)