Datasheet

Appendix B Internal I/O Registers
Rev. 4.00 Jun 06, 2006 page 948 of 1004
REJ09B0301-0400
PWOERA—PWM Output Enable Register A H'FFD3 PWM
PWOERB—PWM Output Enable Register B H'FFD2 PWM
7
OE7
0
R/W
6
OE6
0
R/W
5
OE5
0
R/W
4
OE4
0
R/W
3
OE3
0
R/W
0
OE0
0
R/W
2
OE2
0
R/W
1
OE1
0
R/W
Bit
PWOERA
Initial value
Read/Write
7
OE15
0
R/W
6
OE14
0
R/W
5
OE13
0
R/W
4
OE12
0
R/W
3
OE11
0
R/W
Switching between PWM output and port output
0
OE8
0
R/W
2
OE10
0
R/W
1
OE9
0
R/W
Bit
PWOERB
Initial value
Read/Write
0
1
0
1
0
1
Port input
Port input
Port output or PWM 256/256 output
PWM output (0 to 255/256 output)
DDR OE Description
PWDPRA—PWM Data Polarity Register A H'FFD5 PWM
PWDPRB—PWM Data Polarity Register B H'FFD4 PWM
7
OS7
0
R/W
6
OS6
0
R/W
5
OS5
0
R/W
4
OS4
0
R/W
3
OS3
0
R/W
0
OS0
0
R/W
2
OS2
0
R/W
1
OS1
0
R/W
Bit
PWDPRA
Initial value
Read/Write
7
OS15
0
R/W
6
OS14
0
R/W
5
OS13
0
R/W
4
OS12
0
R/W
3
OS11
0
R/W
0
OS8
0
R/W
2
OS10
0
R/W
1
OS9
0
R/W
Bit
PWDPRB
Initial value
Read/Write
PWM output polarity control
0 PWM direct output (PWDR value corresponds to high width of output)
1 PWM inverted output (PWDR value corresponds to low width of output)