Datasheet

Rev. 3.00 Sep. 28, 2009 Page 906 of 910
REJ09B0350-0300
F
Flash erase block select parameter.......... 701
Flash memory................................. 329, 675
Flash multipurpose address
area parameter ........................................ 700
Flash multipurpose data destination
parameter ................................................ 700
Flash pass and fail parameter.................. 694
Flash program/erase frequency
parameter ................................................ 699
FOVI....................................................... 351
Framing error.......................................... 430
G
General registers....................................... 38
H
H8S/2140B group compatible
vector mode ............................................ 101
Hardware protection ............................... 724
I
I
2
C bus data format................................. 534
I
2
C bus interface (IIC) ............................ 503
ICIA........................................................ 351
ICIX........................................................ 383
IICI ......................................................... 555
Input capture operation........................... 381
Instruction set ........................................... 45
Arithmetic operations instructions........ 48
Bit manipulation instructions................ 51
Block sata transfer instructions............. 55
Branch instructions............................... 53
Data transfer instructions...................... 47
Logic operations instructions................ 50
Shift instructions................................... 50
System control instructions................... 54
Interface ..................................................401
Internal block diagram................................8
Interrupt controller....................................85
Interrupt exception handling.....................81
interrupt exception handling
vector table..............................................108
Interrupt mask bit......................................40
Interval timer mode.................................397
K
Keyboard buffer control unit (PS2) ........561
L
LPC interface (LPC)...............................589
LPC interface clock start request ............647
LSI internal states in each
operating mode .......................................775
M
Mode transition diagram.........................774
Module stop mode ..................................780
Multiply-accumulate register (MAC) .......41
Multiprocessor communication
function...................................................434
N
Noise canceler......................................... 553
O
OCIA.......................................................351
OCIB.......................................................351
On-board programming ..........................701
On-board programming mode.................701
Operation field..........................................56