Datasheet

Section 25 List of Registers
Rev. 3.00 Sep. 28, 2009 Page 786 of 910
REJ09B0350-0300
Register Name Abbreviation
Number
of bits
Address Module
Data
Width
Access
States
Port G noise cancel cycle setting
register
PGNCCS 8 H'F98E
(PORTS = 1)
PORT 8 2
Port I data direction register PIDDR 8 H'F990 PORT 8 2
Port J data direction register PJDDR 8 H'F991 PORT 8 2
Port I output data register PIODR 8 H'F992 PORT 8 2
Port J output data register PJODR 8 H'F993 PORT 8 2
Port I input data register PIPIN 8 H'F994 (Read) PORT 8 2
Port J input data register PJPIN 8 H'F995 (Read) PORT 8 2
Port J pull-up MOS control register PJPCR 8 H'F997 PORT 8 2
Port I Nch-OD control register PINOCR 8 H'F998 PORT 8 2
Port J Nch-OD control register PJNOCR 8 H'F999 PORT 8 2
TDP timer counter_0 TDPCNT_0 16 H'FB40 TDP_0 16 2
TDP pulse width upper limit
register_0
TDPWDMX_0 16 H'FB42 TDP_0 16 2
TDP pulse width lower limit
register_0
TDPWDMN_0 16 H'FB44 TDP_0 16 2
TDP cycle upper limit register_0 TDPPDMX_0 16 H'FB46 TDP_0 16 2
TDP input capture register_0 TDPICR_0 16 H'FB48 TDP_0 16 2
TDP input capture buffer register_0 TDPICRF_0 16 H'FB4A TDP_0 16 2
TDP status register_0 TDPCSR_0 8 H'FB4C TDP_0 8 2
TDP control register 1_0 TDPCR1_0 8 H'FB4D TDP_0 8 2
TDP interrupt enable register_0 TDPIER_0 8 H'FB4E TDP_0 8 2
TDP control register 2_0 TDPCR2_0 8 H'FB4F TDP_0 8 2
TDP cycle lower limit register_0 TDPPDMN_0 16 H'FB50 TDP_0 16 2
TDP timer counter_1 TDPCNT_1 16 H'FB60 TDP_1 16 2
TDP pulse width upper limit
register_1
TDPWDMX_1 16 H'FB62 TDP_1 16 2
TDP pulse width lower limit
register_1
TDPWDMN_1 16 H'FB64 TDP_1 16 2
TDP cycle upper limit register_1 TDPPDMX_1 16 H'FB66 TDP_1 16 2
TDP input capture register_1 TDPICR_1 16 H'FB68 TDP_1 16 2
TDP input capture buffer register_1 TDPICRF_1 16 H'FB6A TDP_1 16 2
TDP status register_1 TDPCSR_1 8 H'FB6C TDP_1 8 2