Datasheet

Section 22 Flash Memory
Rev. 3.00 Sep. 28, 2009 Page 695 of 910
REJ09B0350-0300
(b) Programming
FPFR indicates the return value of the programming result.
Bit Bit Name
Initial
Value
R/W Description
7 ⎯ ⎯ ⎯ Unused
Returns 0.
6 MD ⎯ R/W Programming Mode Related Setting Error Detect
Detects the error protection state and returns the result.
When the error protection state is entered, this bit is set
to 1. Whether the error protection state is entered or not
can be confirmed with the FLER bit in FCCS. For
conditions to enter the error protection state, see section
22.9.3, Error Protection.
0: Normal operation (FLER = 0)
1: Error protection state, and programming cannot be
performed (FLER = 1)
5 EE ⎯ R/W Programming Execution Error Detect
Writes 1 to this bit when the specified data could not be
written because the user MAT was not erased. If this bit
is set to 1, there is a high possibility that the user MAT
has been written to partially. In this case, after removing
the error factor, erase the user MAT. Also an attempt to
write the user MAT when the FMATS value is H'AA and
the user boot MAT is selected leads to a programming
execution error. In that case, both the user MAT and
user boot MAT are not rewritten. Writing to the user boot
MAT must be performed in boot mode or programmer
mode.
0: Programming has ended normally
1: Programming has ended abnormally (programming
result is not guaranteed)
4 FK ⎯ R/W Flash Key Register Error Detect
Checks the FKEY value (H'5A) before programming
starts, and returns the result.
0: FKEY setting is normal (H'5A)
1: FKEY setting is abnormal (value other than H'5A)
3 ⎯ ⎯ ⎯ Unused
Returns 0.