Datasheet

Section 1 Overview
Rev. 3.00 Sep. 28, 2009 Page 27 of 910
REJ09B0350-0300
Pin No.
Type Symbol TFP-144V BP-176V TLP-145V I/O Name and Function
I/O port PJ7 to PJ0 ⎯ K15, J14,
F15, A14,
C12,
C10, B8,
C5
⎯ Input/
Output
8-bit input/output pins.
Notes: 1. Pins PE4 to PE1 are not supported by the system development tool (emulator).
2. Following precautions are required on the power-on reset signal that is applied to the
ETRST pin.
The reset signal should be applied on power supply.
Set apart the power-on reset circuit from this LSI to prevent the ETRST pin of the
emulator from affecting the operation of this LSI.
Set apart the power-on reset circuit from this LSI to prevent the system reset of this LSI
from affecting the ETRST pin of the emulator.